LAN9353 Datasheet, PDF (458/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.8.32 1588 PORT X RX PDELAY_REQ INGRESS CORRECTION FIELD HIGH REGISTER
(1588_RX_PDREQ_CF_HI_X)
Offset:
Bank:
180h
1
Size:
32 bits
This register combined with the 1588 Port x RX Pdelay_Req Ingress Correction Field Low Register (1588_RX_P-
DREQ_CF_LOW_x) contains the correction field from the last Pdelay_Req message. Only the nanoseconds portion is
used.
This register is automatically updated if the Auto Update (AUTO) bit is set.
Note:
Port and GPIO registers share a common address space. Port registers are selected by the Bank Select
(BANK_SEL[2:0] in the 1588 Bank Port GPIO Select Register (1588_BANK_PORT_GPIO_SEL). The port
accessed (“x”) is set by the Port Select (PORT_SEL[1:0]) field.
Bits
Description
31:0 Correction Field (CF[63:32])
This field contains the upper 32 bits of the correction field.
Type
R/W
Default
00000000h
DS00001925A-page 458
 2015 Microchip Technology Inc.