LAN9353 Datasheet, PDF (498/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
18.1.3 HARDWARE CONFIGURATION REGISTER (HW_CFG)
Offset:
074h
Size:
32 bits
This register allows the configuration of various hardware features.
Note:
This register can be read while the device is in the reset or not ready / power savings states without leaving
the host interface in an intermediate state. If the host interface is in a reset state, returned data may be
invalid.
Note: It is not necessary to read all fours BYTEs of this register. DWORD access rules do not apply to this register.
Bits
Description
31:28 RESERVED
27 Device Ready (READY)
When set, this bit indicates that the device is ready to be accessed. Upon
power-up, RST# reset, return from power savings states, or digital reset, the
host processor may interrogate this field as an indication that the device has
stabilized and is fully active.
26
25
24:22
This rising edge of this bit will assert the Device Ready (READY) bit in the
Interrupt Status Register (INT_STS) and can cause an interrupt if enabled.
Note:
With the exception of the HW_CFG, PMT_CTRL, BYTE_TEST, and
RESET_CTL registers, read access to any internal resources is
forbidden while the READY bit is cleared. Writes to any address
are invalid until this bit is set.
Note: This bit is identical to bit 0 of the Power Management Control
Register (PMT_CTRL).
AMDIX_EN Strap State Port B
This bit reflects the state of the auto_mdix_strap_2 strap that connects to the
PHY. The strap value is loaded with the level of the auto_mdix_strap_2
during reset and can be re-written by the EEPROM Loader. The strap value
can be overridden by bit 15 and 13 of the Port B PHY x Special Control/Sta-
tus Indication Register (PHY_SPECIAL_CONTROL_STAT_IND_x)PHY Spe-
cial Control/Status Indication Register.
AMDIX_EN Strap State Port A
This bit reflects the state of the auto_mdix_strap_1 strap that connects to the
PHY. The strap value is loaded with the level of the auto_mdix_strap_1
during reset and can be re-written by the EEPROM Loader. The strap value
can be overridden by bit 15 and 13 of the Port A PHY x Special Control/Sta-
tus Indication Register (PHY_SPECIAL_CONTROL_STAT_IND_x).
RESERVED
21:16 RESERVED
15:14 RESERVED
13:12 RESERVED
11:0 RESERVED
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
-
0b
Note 2
Note 3
-
-
-
-
-
DS00001925A-page 498
 2015 Microchip Technology Inc.