LAN9353 Datasheet, PDF (423/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.8.3 1588 INTERRUPT STATUS REGISTER (1588_INT_STS)
Offset:
Bank:
108h
na
Size:
32 bits
This read/write register contains the 1588 interrupt status bits.
Writing a 1 to a interrupt status bits acknowledges and clears the individual interrupt. If enabled in the 1588 Interrupt
Enable Register (1588_INT_EN), these interrupt bits are cascaded into the 1588 Interrupt Event (1588_EVNT) bit of the
Interrupt Status Register (INT_STS). Status bits will still reflect the status of the interrupt source regardless of whether
the source is enabled as an interrupt. The 1588 Interrupt Event Enable (1588_EVNT_EN) bit of the Interrupt Enable
Register (INT_EN) must also be set in order for an actual system level interrupt to occur. Refer to Section 8.0, "System
Interrupts," on page 84 for additional information.
Bits
Description
31:24
1588 GPIO Falling Edge Interrupt (1588_GPIO_FE_INT[7:0])
This interrupt indicates that a falling event occurred and the 1588 Clock was
captured.
Note: As 1588 capture inputs, GPIO inputs are edge sensitive and must
be low for greater than 40 ns to be recognized as interrupt inputs.
These bits can also be set due to a manual capture via 1588 Manual Capture
(1588_MANUAL_CAPTURE).
23:16
1588 GPIO Rising Edge Interrupt (1588_GPIO_RE_INT[7:0])
This interrupt indicates that a rising event occurred and the 1588 Clock was
captured.
Note: As 1588 capture inputs, GPIO inputs are edge sensitive and must
be high for greater than 40 ns to be recognized as interrupt inputs.
These bits can also be set due to a manual capture via 1588 Manual Capture
(1588_MANUAL_CAPTURE).
15
14:12
RESERVED
1588 TX Timestamp Interrupt (1588_TX_TS_INT[2:0])
This interrupt (one bit per port) indicates that a PTP packet was transmitted
and its egress time stored. Up to four events, as indicated by the 1588 TX
Timestamp Count (1588_TX_TS_CNT[2:0]) field in the 1588 Port x Capture
Information Register (1588_CAP_INFO_x), are buffered per port.
11 RESERVED
10:8 1588 RX Timestamp Interrupt (1588_RX_TS_INT[2:0])
This interrupt (one bit per port) indicates that a PTP packet was received and
its ingress time and associated data stored. Up to four events, as indicated
by the 1588 RX Timestamp Count (1588_RX_TS_CNT[2:0]) field in the 1588
Port x Capture Information Register (1588_CAP_INFO_x), are buffered per
port.
7:2 RESERVED
Type
R/WC
R/WC
RO
R/WC
RO
R/WC
RO
Default
00h
00h
-
000b
-
000b
-
 2015 Microchip Technology Inc.
DS00001925A-page 423