LAN9353 Datasheet, PDF (381/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

14.2.4 SMI TIMING REQUIREMENTS
FIGURE 14-1:
SMI TIMING
MDC
t_val
t_ohold
MDIO
(Data-Out)
t_clkp
t_clkh t_clkl
t_ohold
MDIO
(Data-In)
LAN9353
t_su t_ihold
TABLE 14-2: SMI TIMING VALUES
Symbol
t_clkp
t_clkh
t_clkl
t_val
t_ohold
t_su
t_ihold
Description
MDC period
MDC high time
MDC low time
MDIO output valid from rising edge of MDC
MDIO output hold from rising edge of MDC
MDIO input setup time to rising edge of MDC
MDIO input hold time after rising edge of MDC
Min
400
160 (80%)
160 (80%)
-
10
10
5
Max
-
-
-
300
-
-
-
Units
ns
ns
ns
ns
ns
ns
ns
Notes
Note 4
Note 4
Note 5
Note 5
Note 4: The SMI slave design changes output data a nominal 4 clocks (100MHz) maximum and a nominal 2 clocks
(100 MHz) minimum following the rising edge of MDC.
Note 5: The SMI slave design samples input data using the rising edge of MDC.
 2015 Microchip Technology Inc.
DS00001925A-page 381