LAN9353 Datasheet, PDF (181/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
9.3 Virtual PHYs 0 and 1
The Virtual PHY provides a basic MII management interface (MDIO) per EEE 802.3 (clause 22) so that a MAC with an
unmodified driver can be supported as if it was attached to a single port PHY. This functionality is designed to allow easy
and quick integration of the device into designs with minimal driver modifications. The Virtual PHY provides a full bank
of registers which comply with the IEEE 802.3 specification. This enables the Virtual PHY to provide various status and
control bits similar to those provided by a real PHY. These include the output of speed selection, duplex, loopback, iso-
late, collision test, and Auto-Negotiation status. For a list of all Virtual PHY registers and related bit descriptions, refer
to Section 9.3.5, "Virtual PHY Registers," on page 185.
Depending on the configuration, one or two virtual PHYs are active.
Note:
Because Virtual PHYs 0 and 1 are functionally identical, this section will describe them as the “Virtual PHY
x”, or simply “VPHY”. Wherever a lowercase “x” has been appended to a port or signal name, it can be
replaced with “0” or “1” to indicate the VPHY 0 or VPHY 1 respectively.
9.3.1 VIRTUAL PHY AUTO-NEGOTIATION
The purpose of the Auto-Negotiation function is to automatically configure the Virtual PHY to the optimum link parame-
ters based on the capabilities of its link partner. Because the Virtual PHY has no actual link partner, the Auto-Negotiation
process is emulated with deterministic results.
Auto-Negotiation is enabled by setting the Auto-Negotiation (VPHY_AN) bit of the Port x Virtual PHY Basic Control Reg-
ister (VPHY_BASIC_CTRL_x) and is restarted by the occurrence of any of the following events:
• Power-On Reset (POR)
• Hardware reset (RST#)
• PHY Software reset (via the Virtual PHY 0 Reset (VPHY_0_RST) or Virtual PHY 1 Reset (VPHY_1_RST) bits of
the Reset Control Register (RESET_CTL) or the Reset (VPHY_RST) bit of the Port x Virtual PHY Basic Control
Register (VPHY_BASIC_CTRL_x))
• Setting the Port x Virtual PHY Basic Control Register (VPHY_BASIC_CTRL_x), Restart Auto-Negotiation
(VPHY_RST_AN) bit high
• Digital Reset (via the Digital Reset (DIGITAL_RST) bit of the Reset Control Register (RESET_CTL))
• Issuing an EEPROM Loader RELOAD command (Section 12.4, "EEPROM Loader," on page 353)
Note: Auto-Negotiation is also restarted after the EEPROM Loader updates the straps.
The emulated Auto-Negotiation process is much simpler than the real process and can be categorized into three steps:
1. The Auto-Negotiation Complete bit is set in the Port x Virtual PHY Basic Status Register (VPHY_BASIC_STA-
TUS_x).
2. The Page Received bit is set in the Port x Virtual PHY Auto-Negotiation Expansion Register (VPHY_AN_EXP_x).
3. The Auto-Negotiation result (speed, duplex and pause) is determined and registered.
The Auto-Negotiation result (speed and duplex) is determined using the Highest Common Denominator (HCD) of the
Port x Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV_x) and Port x Virtual PHY Auto-Negoti-
ation Link Partner Base Page Ability Register (VPHY_AN_LP_BASE_ABILITY_x) as specified in the IEEE 802.3 stan-
dard. The technology ability bits of these registers are ANDed, and if there are multiple bits in common, the priority is
determined as follows:
• 100Mbps Full Duplex (highest priority)
• 100Mbps Half Duplex
• 10Mbps Full Duplex
• 10Mbps Half Duplex (lowest priority)
For example, if the full capabilities of the Virtual PHY are advertised (100Mbps, Full Duplex), and if the link partner is
capable of 10Mbps and 100Mbps, then Auto-Negotiation selects 100Mbps as the highest performance mode. If the link
partner is capable of half and full-duplex modes, then Auto-Negotiation selects full-duplex as the highest performance
operation. In the event that there are no bits in common, an emulated Parallel Detection is used.
The Port x Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV_x) defaults to having all four ability
bits set. These values can be reconfigured via software. Once the Auto-Negotiation is complete, any change to the Port
x Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV_x) only takes affect when the Auto-Negotia-
tion process is re-run.
 2015 Microchip Technology Inc.
DS00001925A-page 181