LAN9353 Datasheet, PDF (63/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
Bits
Description
Type
28 Power Management Sleep Enable (PM_SLEEP_EN)
R/W/SC
Setting this bit enters the chip level power management mode specified with
the Power Management Mode (PM_MODE) field.
0: Device is not in a low power sleep state
1: Device is in a low power sleep state
This bit can not be written at the same time as the PM_MODE register field.
The PM_MODE field must be set, and then this bit must be set for proper
device operation.
Writes to this bit with a value of 1 are ignored if Power Management Mode
(PM_MODE) is being written with a new value.
Note:
Although not prevented by H/W, this bit should not be written with
a value of 1 while Power Management Mode (PM_MODE) has a
value of “D0”.
This field is cleared when the device wakes up.
27 Power Management Wakeup (PM_WAKE)
R/W
When set, this bit enables automatic wake-up based on PME events.
0: Manual Wakeup only
1: Auto Wakeup enabled
26 LED Disable (LED_DIS)
R/W
This bit disables LED outputs. Open-drain / open-source LEDs are un-driven.
Push-pull LEDs are still driven but are set to their inactive state.
0: LEDs are enabled
1: LEDs are disabled
25 1588 Clock Disable (1588_DIS)
R/W
This bit disables the clocks for the entire 1588 Unit.
0: Clocks are enabled
1: Clocks are disabled
In order for this bit to be set, it must be written as a 1 two consecutive times.
A write of a 0 will reset the count.
24 1588 Timestamp Unit 2 Clock Disable (1588_TSU_2_DIS)
R/W
This bit disables the clocks for 1588 timestamp unit 2.
0: Clocks are enabled
1: Clocks are disabled
In order for this bit to be set, it must be written as a 1 two consecutive times.
A write of a 0 will reset the count.
Default
0b
0b
0b
0b
0b
 2015 Microchip Technology Inc.
DS00001925A-page 63