LAN9353 Datasheet, PDF (414/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.6 Software Triggered Clock Capture
As an alternative, the GPIO Capture registers can be used by Host software to recorded software events by specifying
the GPIO register set in the 1588 Manual Capture Select 3-0 (1588_MANUAL_CAPTURE_SEL[3:0]) and setting the
1588 Manual Capture (1588_MANUAL_CAPTURE) bit in the 1588 Command and Control Register (1588_CMD_CTL).
This also causes the corresponding bit in the 1588 Interrupt Status Register (1588_INT_STS) to set.
Note: The interrupts available in the General Purpose I/O Interrupt Status and Enable Register (GPI-
O_INT_STS_EN) are not set by the using this method.
Note: The Lock Enable GPIO Rising Edge (LOCK_GPIO_RE) and Lock Enable GPIO Falling Edge (LOCK_GPI-
O_FE) bits do not apply to manual clock capture.
The full set of GPIO Capture registers is always available regardless of the number of GPIOs supported by the device.
15.7 1588 Interrupt
The IEEE 1588 unit provides multiple interrupt conditions. These include timestamp indication on the transmitter and
receiver side of each port, individual GPIO input timestamp interrupts, and a clock comparison event interrupts. All 1588
interrupts are located in the 1588 Interrupt Status Register (1588_INT_STS) and are fully maskable via their respective
enable bits in the 1588 Interrupt Enable Register (1588_INT_EN).
All 1588 interrupts are ANDed with their individual enables and then ORed, generating the 1588 Interrupt Event
(1588_EVNT) bit of the Interrupt Status Register (INT_STS).
When configured as inputs, the GPIOs have the added functionality of clearing the 1588 Timer Interrupt A (1588_TIM-
ER_INT_A) or 1588 Timer Interrupt B (1588_TIMER_INT_B) bits of the 1588 Interrupt Status Register (1588_INT_STS)
as described in Section 15.5.1.2.
Refer to Section 8.0, "System Interrupts," on page 84 for additional information on the device interrupts.
DS00001925A-page 414
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