LAN9353 Datasheet, PDF (91/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
8.3.2 INTERRUPT STATUS REGISTER (INT_STS)
Offset:
058h
Size:
32 bits
This register contains the current status of the generated interrupts. A value of 1 indicates the corresponding interrupt
conditions have been met, while a value of 0 indicates the interrupt conditions have not been met. The bits of this register
reflect the status of the interrupt source regardless of whether the source has been enabled as an interrupt in the Inter-
rupt Enable Register (INT_EN). Where indicated as R/WC, writing a 1 to the corresponding bits acknowledges and
clears the interrupt.
Bits
31
30
29
28
27
26
25:23
22
21:20
19
18
Description
Software Interrupt (SW_INT)
This interrupt is generated when the Software Interrupt Enable
(SW_INT_EN) bit of the Interrupt Enable Register (INT_EN) is set high.
Writing a one clears this interrupt.
Device Ready (READY)
This interrupt indicates that the device is ready to be accessed after a
power-up or reset condition.
1588 Interrupt Event (1588_EVNT)
This bit indicates an interrupt event from the IEEE 1588 module. This bit
should be used in conjunction with the 1588 Interrupt Status Register
(1588_INT_STS) to determine the source of the interrupt event within the
1588 module.
Switch Fabric Interrupt Event (SWITCH_INT)
This bit indicates an interrupt event from the Switch Fabric. This bit should
be used in conjunction with the Switch Global Interrupt Pending Register
(SW_IPR) to determine the source of the interrupt event within the Switch
Fabric.
Physical PHY B Interrupt Event (PHY_INT_B)
This bit indicates an interrupt event from the Physical PHY B. The source of
the interrupt can be determined by polling the PHY x Interrupt Source Flags
Register (PHY_INTERRUPT_SOURCE_x).
Physical PHY A Interrupt Event (PHY_INT_A)
This bit indicates an interrupt event from the Physical PHY A. The source of
the interrupt can be determined by polling the PHY x Interrupt Source Flags
Register (PHY_INTERRUPT_SOURCE_x).
RESERVED
RESERVED
RESERVED
GP Timer (GPT_INT)
This interrupt is issued when the General Purpose Timer Count Register
(GPT_CNT) wraps past zero to FFFFh.
RESERVED
Type
R/WC
R/WC
RO
RO
RO
RO
RO
RO
RO
R/WC
RO
Default
0b
0b
0b
0b
0b
0b
-
-
-
0b
-
 2015 Microchip Technology Inc.
DS00001925A-page 91