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LAN9353 Datasheet, PDF (430/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII
LAN9353
15.8.9
1588 CLOCK TEMPORARY RATE ADJUSTMENT REGISTER
(1588_CLOCK_TEMP_RATE_ADJ)
Offset:
Bank:
120h
na
Size:
32 bits
This register is used to temporarily adjust the rate of the 1588 Clock. Every 10 ns, 1588 Clock is normally incremented
by 10 ns. This register is used to occasionally change that increment to 9 or 11 ns.
Bits
Description
31 Clock Temporary Rate Adjustment Direction
(1588_CLOCK_TEMP_RATE_ADJ_DIR)
This field specifies if the 1588 Temporary Rate Adjustment causes the 1588
Clock to be faster or slower than the reference clock.
0 = slower (1588 Clock increments by 9 ns)
1 = faster (1588 Clock increments by 11 ns)
30 RESERVED
29:0 Clock Temporary Rate Adjustment Value
(1588_CLOCK_TEMP_RATE_ADJ_VALUE)
This field indicates a temporary adjustment to the reference clock period of
the 1588 Clock in units of 2-32ns. On each 10ns reference clock cycle, this
value is added to the 32-bit sub-nanoseconds portion of the 1588 Clock.
When the sub-nanoseconds portion wraps around to zero, the 1588 Clock
will be adjusted by 1ns (a 9 or 11 ns increment instead of the normal 10ns).
Type
R/W
RO
R/W
Default
0b
-
00000000h
DS00001925A-page 430
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