LAN9353 Datasheet, PDF (493/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
17.4.3 GENERAL PURPOSE I/O DATA & DIRECTION REGISTER (GPIO_DATA_DIR)
Offset:
1E4h
Size:
32 bits
This read/write register configures the direction of the GPIO pins and contains the GPIO input and output data bits.
Bits
Description
31:24
23:16
RESERVED
GPIO Direction 7-0 (GPIODIR[7:0])
These bits set the input/output direction of the 8 GPIO pins.
0: GPIO pin is configured as an input
1: GPIO pin is configured as an output
15:8 RESERVED
7:0 GPIO Data 7-0 (GPIOD[7:0])
When a GPIO pin is enabled as an output, the value written to this field is out-
put on the corresponding GPIO pin.
Upon a read, the value returned depends on the current direction of the pin. If
the pin is an input, the data reflects the current state of the corresponding
GPIO pin. If the pin is an output, the data is the value that was last written into
this register. The pin direction is determined by the GPIODIR bits of this reg-
ister and the 1588_GPIO_OE bits in the General Purpose I/O Configuration
Register (GPIO_CFG).
Type
RO
R/W
RO
R/W
Default
-
00h
-
00h
 2015 Microchip Technology Inc.
DS00001925A-page 493