LAN9353 Datasheet, PDF (497/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
18.1.2 BYTE ORDER TEST REGISTER (BYTE_TEST)
Offset:
064h
Size:
32 bits
This read-only register can be used to determine the byte ordering of the current configuration.
For host interfaces that are disabled during the reset state, the BYTE_TEST register can be used to determine when
the device has exited the reset state.
Note:
This register can be read while the device is in the reset or not ready / power savings states without leaving
the host interface in an intermediate state. If the host interface is in a reset state, returned data may be
invalid. However, during reset, the returned data will not match the normal valid data pattern.
Note: It is not necessary to read all fours BYTEs of this register. DWORD access rules do not apply to this register.
Bits
Description
31:0 Byte Test (BYTE_TEST)
This field reflects the current byte ordering
Type
RO
Default
87654321h
 2015 Microchip Technology Inc.
DS00001925A-page 497