LAN9353 Datasheet, PDF (239/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
10.6.5 SWITCH FABRIC CSR INTERFACE COMMAND REGISTER (SWITCH_CSR_CMD)
Offset:
1B0h
Size:
32 bits
This read/write register is used in conjunction with the Switch Fabric CSR Interface Data Register (SWITCH_CSR_-
DATA) to control the read and write operations to the various Switch Fabric CSRs. Refer to Section 10.7, "Switch Fabric
Control and Status Registers," on page 246 for details on the registers indirectly accessible via this register.
Bits
Description
31 CSR Busy (CSR_BUSY)
When a 1 is written to this bit, the read or write operation (as determined by
the R_nW bit) is performed to the specified Switch Fabric CSR in CSR
Address (CSR_ADDR[15:0]). This bit will remain set until the operation is
complete, at which time the bit will self-clear. In the case of a read, the clear-
ing of this bit indicates to the Host that valid data can be read from the Switch
Fabric CSR Interface Data Register (SWITCH_CSR_DATA). The
SWITCH_CSR_CMD and SWITCH_CSR_DATA registers should not be
modified until this bit self-clears.
30 Read/Write (R_nW)
This bit determines whether a read or write operation is performed by the
Host to the specified Switch Fabric CSR.
Type
R/W
SC
R/W
0: Write
1: Read
29 Auto Increment (AUTO_INC)
R/W
This bit enables/disables the auto increment feature.
When this bit is set, a write to the Switch Fabric CSR Interface Data Register
(SWITCH_CSR_DATA) will automatically set the CSR Busy (CSR_BUSY)
bit. Once the write command is finished, the CSR Address
(CSR_ADDR[15:0]) will automatically increment.
When this bit is set, a read from the Switch Fabric CSR Interface Data Regis-
ter (SWITCH_CSR_DATA) will automatically increment the CSR Address
(CSR_ADDR[15:0]) and set the CSR Busy (CSR_BUSY) bit. This bit should
be cleared by software before the last read from the SWITCH_CSR_DATA
register.
0: Disable Auto Increment
1: Enable Auto Increment
Note: This bit has precedence over the Auto Decrement (AUTO_DEC)
bit.
Default
0b
0b
0b
 2015 Microchip Technology Inc.
DS00001925A-page 239