LAN9353 Datasheet, PDF (30/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
TABLE 3-7: SWITCH PORT 1 RMII & CONFIGURATION STRAP PIN DESCRIPTIONS
Num
Pins
Name
Port 1 RMII
Duplex
Symbol
P1_DUPLEX
Buffer
Type
VIS
(PU)
Description
RMII MAC Mode: This pin can be changed at any
time (live value) and is typically tied to the duplex
indication from the external PHY. It can be overrid-
den by the Duplex Mode (VPHY_DUPLEX) bit in the
Port 1 Port x Virtual PHY Basic Control Register
(VPHY_BASIC_CTRL_x) by clearing the Auto-
Negotiation (VPHY_AN) bit in the same register.
1
Port 1 RMII
Management
Clock
-
P1_MDC
-
VIS
(PU)
The polarity of this pin is determined by the duplex-
_pol_strap_1.
RMII PHY Mode: This is the management clock
input from an external master and is used to access
port 1’s Virtual PHY.
Note:
To avoid a floating signal, an external
pull-down is recommended when the MII
management interface is not used.
Internal PHY Mode: This pin is not used.
DS00001925A-page 30
 2015 Microchip Technology Inc.