LAN9353 Datasheet, PDF (418/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.8.1 1588 COMMAND AND CONTROL REGISTER (1588_CMD_CTL)
Offset:
Bank:
100h
na
Size:
32 bits
Bits
Description
31:14
13
RESERVED
Clock Target Read (1588_CLOCK_TARGET_READ)
Writing a one to this bit causes the current values of both of the 1588 clock
targets (A and B) to be saved into the 1588 Clock Target x Seconds Register
(1588_CLOCK_TARGET_SEC_x) and the 1588 Clock Target x NanoSec-
onds Register (1588_CLOCK_TARGET_NS_x) so they can be read.
Writing a zero to this bit has no affect.
12:9 1588 Manual Capture Select 3-0 (1588_MANUAL_CAPTURE_SEL[3:0])
These bits specify which GPIO 1588 Clock Capture Registers are used
during a manual capture. Bit 3 selects the rising edge (0) or falling edge (1)
registers. Bits 2-0 select the GPIO number.
Type
RO
WO
SC
R/W
Note: All 8 GPIO register sets are available.
8
1588 Manual Capture (1588_MANUAL_CAPTURE)
WO
Writing a one to this bit causes the current value of the 1588 clock to be
SC
saved into the GPIO 1588 Clock Capture Registers specified above.
The corresponding bit in the 1588 Interrupt Status Register (1588_INT_STS)
is also set.
Writing a zero to this bit has no affect.
7
Clock Temporary Rate (1588_CLOCK_TEMP_RATE)
WO
Writing a one to this bit enables the use of the temporary clock rate adjust-
SC
ment specified in the 1588 Clock Temporary Rate Adjustment Register
(1588_CLOCK_TEMP_RATE_ADJ) for the duration specified in the 1588
Clock Temporary Rate Duration Register (1588_CLOCK_TEMP_RATE_DU-
RATION).
Writing a zero to this bit has no affect.
6
Clock Step NanoSeconds (1588_CLOCK_STEP_NANOSECONDS)
WO
Writing a one to this bit adds the value of the Clock Step Adjustment Value
SC
(1588_CLOCK_STEP_ADJ_VALUE) field in the 1588 Clock Step Adjustment
Register (1588_CLOCK_STEP_ADJ) to the nanoseconds portion of the 1588
Clock.
Writing a zero to this bit has no affect.
Default
-
0b
0000b
0b
0b
0b
DS00001925A-page 418
 2015 Microchip Technology Inc.