LAN9353 Datasheet, PDF (313/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
10.7.3.27 Switch Engine Ingress Rate Command Register (SWE_INGRSS_RATE_CMD)
Register #:
184Bh
Size:
32 bits
This register is used to indirectly read and write the ingress rate metering/color table registers. A write to this address
performs the specified access.
For a read access, the Operation Pending bit in the Switch Engine Ingress Rate Command Status Register (SWE_IN-
GRSS_RATE_CMD_STS) indicates when the command is finished. The Switch Engine Ingress Rate Read Data Reg-
ister (SWE_INGRSS_RATE_RD_DATA) can then be read.
For a write access, the Switch Engine Ingress Rate Write Data Register (SWE_INGRSS_RATE_WR_DATA) should be
written first. The Operation Pending bit in the Switch Engine Ingress Rate Command Status Register (SWE_IN-
GRSS_RATE_CMD_STS) indicates when the command is finished.
For details on 16-bit wide Ingress Rate Table registers indirectly accessible by this register, see INGRESS RATE TABLE
REGISTERS below.
Bits
Description
31:8 RESERVED
7
Ingress Rate RnW
These bits specify a read(1) or write(0) command.
6:5 Type
These bits select between the ingress rate metering/color table registers as
follows:
00 = RESERVED
01 = Committed Information Rate Registers (uses CIS Address field)
10 = Committed Burst Register
11 = Excess Burst Register
4:0 CIR Address
These bits select one of the 24 Committed Information Rate registers.
When Rate Mode is set to Source Port & Priority in the Switch Engine Ingress
Rate Configuration Register (SWE_INGRSS_RATE_CFG), the first set of 8
registers (CIR addresses 0-7) are for to Port 0, the second set of 8 registers
(CIR addresses 8-15) are for Port 1 and the third set of registers (CIR
addresses 16-23) are for Port 2. Priority 0 is the lower register of each set
(e.g., 0, 8 and 16).
When Rate Mode is set to Source Port Only, the first register (CIR address 0)
is for Port 0, the second register (CIR address 1) is for Port 1 and the third
register (CIR address 2) is for Port 2.
When Rate Mode is set to Priority Only, the first register (CIR address 0) is
for priority 0, the second register (CIR address 1) is for priority 1 and so forth
up to priority 23.
Note: Values outside of the valid range may cause unexpected results.
Type
RO
R/W
R/W
R/W
Default
-
0b
00b
00000b
 2015 Microchip Technology Inc.
DS00001925A-page 313