LAN9353 Datasheet, PDF (284/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
10.7.2.47 Port x TX LPI Transitions Register (TX_LPI_TRANSITION_x)
Register #:
Port0: 0464h
Port1: 0864h
Port2: 0C64h
Size:
32 bits
This register indicates the total number of times TX LPI request to the PHY changed from de-asserted to asserted.
Bits
Description
31:0 EEE TX LPI Transitions
Count of total number of times the TX LPI request to the PHY changed from
de-asserted to asserted.
The counter is reset if the Energy Efficient Ethernet (EEE_ENABLE) bit in the
Port x MAC Transmit Configuration Register (MAC_TX_CFG_x) is low.
10.7.2.48 Port x TX LPI Time Register (TX_LPI_TIME_x)
Type
RO
Default
00000000h
Register #:
Port0: 0465h
Port1: 0865h
Port2: 0C65h
Size:
32 bits
This register shows the total duration that TX LPI request to the PHY has been asserted.
Bits
Description
31:0 EEE TX LPI Time
This field shows the total duration, in microseconds, that TX LPI request to
the PHY has been asserted.
The counter is reset if the Energy Efficient Ethernet (EEE_ENABLE) bit in the
Port x MAC Transmit Configuration Register (MAC_TX_CFG_x) is low.
Type
RO
Default
00000000h
DS00001925A-page 284
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