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| LAN9353 Datasheet, PDF (393/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII | |||
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LAN9353
14.4.2 PORT 1 MANAGEMENT PATH CONFIGURATIONS
Port 1 can be configured into the following modes of operation:
⢠Port 1 Internal PHY Mode I2C or SMI Managed
⢠Port 1 MAC Mode I2C or SMI Managed
⢠Port 1 PHY Mode I2C or SMI Managed
14.4.2.1 Port 1 Internal PHY Mode I2C or SMI Managed
In this mode, Virtual PHY 1 is not used. Physical PHY A is managed as explained in the previous section. The Virtual
PHY 1 parallel interface is accessible via the I2C or SMI slaves and the EEPROM Loader. However, this block is not
used in this mode.
14.4.2.2 Port 1 MAC Mode I2C or SMI Managed
In this mode, Virtual PHY 1 is not used. The external PHY attached to Port 1 may be managed by either the PMI via the
Port 0 MII pins (when I2C managed) or by the external master attached to the Port 0 MII pins (when SMI managed).
The Virtual PHY 1 parallel interface is accessible via the I2C or SMI slaves and the EEPROM Loader. However, this
block is not used in this mode.
14.4.2.3 Port 1 PHY Mode I2C or SMI Managed
In this mode, Virtual PHY 1 is accessed via an external master attached to the Port 1 MII pins. The Virtual PHY 1 parallel
interface is accessible via the I2C or SMI slaves and the EEPROM Loader.
ï£ 2015 Microchip Technology Inc.
DS00001925A-page 393
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