LAN9353 Datasheet, PDF (10/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
3.0 PIN DESCRIPTIONS AND CONFIGURATION
3.1 64-QFN Pin Assignments
FIGURE 3-1:
64-QFN PIN ASSIGNMENTS (TOP VIEW)
OSCI 1
OSCO 2
OSCVDD12 3
OSCVSS 4
VDD33 5
VDDCR 6
REG_EN 7
FXLOSEN 8
FXSDA/FXLOSA/FXSDENA 9
FXSDB/FXLOSB/FXSDENB 10
RST# 11
GPIO7 12
GPIO6 13
VDDIO 14
P0_OUTD3*
P1_OUTD1/P1_MODE2^{† 15}
P0_OUTD2/P0_MODE3*
P1_OUTD0/P1_MODE1^†
16
LAN9353
64-QFN
(Top View)
VSS
(Connect exposed pad to ground with a via field)
48 LED0/GPIO0/TDO/MGNT0
47 VDDIO
46 LED1/GPIO1/TDI/P1_INTPHY
45 LED2/GPIO2/E2PSIZE
44 IRQ
43 I2CSCL/EESCL/TCK
42 I2CSDA/EESDA/TMS
41 TESTMODE
40 P0_MDIO
39 P0_MDC
38 VDDCR
37 VDDIO
36 P0_DUPLEX
35
RESERVED*
P1_OUTDV^†
34 LED3/GPIO3/EEEEN
33
P0_INER*
P1_INDV^†
Note: Exposed pad (VSS) on bottom of package must be connected to ground with a via field.
* Pin function(s) when P1_INTPHY configuration strap = 1b (1xMII/RMII).
† _{Pin function(s) when P1_INTPHY configuration strap = 0b (2xRGMI).}
Note: When a “#” is used at the end of the signal name, it indicates that the signal is active low. For example,
RST# indicates that the reset signal is active low.
The buffer type for each signal is indicated in the “Buffer Type” column of the pin description tables in Sec-
tion 3.3, "Pin Descriptions". A description of the buffer types is provided in Section 1.2, "Buffer Types".
DS00001925A-page 10
 2015 Microchip Technology Inc.