LAN9353 Datasheet, PDF (332/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
Bits
Description
2
Change Tag Port 0
Identical to Change Tag Port 2 definition above.
1:0 Egress Port Type Port 0
Identical to Egress Port Type Port 2 definition above.
Type
R/W
R/W
Default
0b
0b
10.7.4.14 Buffer Manager Port 0 Egress Rate Priority Queue 0/1 Register (BM_EGRSS_RATE_00_01)
Register #:
1C0Dh
Size:
32 bits
This register, along with the Buffer Manager Configuration Register (BM_CFG), is used to configure the egress rate pac-
ing.
Bits
Description
31:26
25:13
RESERVED
Egress Rate Port 0 Priority Queue 1
These bits specify the egress data rate for the Port 0 priority queue 1. The
rate is specified in time per byte. The time is this value plus 1 times 20 ns.
12:0 Egress Rate Port 0 Priority Queue 0
These bits specify the egress data rate for the Port 0 priority queue 0. The
rate is specified in time per byte. The time is this value plus 1 times 20 ns.
Type
RO
R/W
R/W
Default
-
00000
00000000b
00000
00000000b
10.7.4.15 Buffer Manager Port 0 Egress Rate Priority Queue 2/3 Register (BM_EGRSS_RATE_02_03)
Register #:
1C0Eh
Size:
32 bits
This register, along with the Buffer Manager Configuration Register (BM_CFG), is used to configure the egress rate pac-
ing.
Bits
Description
31:26
25:13
RESERVED
Egress Rate Port 0 Priority Queue 3
These bits specify the egress data rate for the Port 0 priority queue 3. The
rate is specified in time per byte. The time is this value plus 1 times 20 ns.
12:0 Egress Rate Port 0 Priority Queue 2
These bits specify the egress data rate for the Port 0 priority queue 2. The
rate is specified in time per byte. The time is this value plus 1 times 20 ns.
Type
RO
R/W
R/W
Default
-
00000
00000000b
00000
00000000b
DS00001925A-page 332
 2015 Microchip Technology Inc.