LAN9353 Datasheet, PDF (412/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.4 1588 Clock Events
The 1588 Clock Events block is responsible for generating and controlling all 1588 Clock related events. Two clock
event channels, A and B, are available. The block diagram is shown in Figure 15-2.
FIGURE 15-2:
1588 CLOCK EVENT BLOCK DIAGRAM
IEEE 1588 Clock Events
Reload / Add A or B
host
load / add
Clock Target A or B
1588 Clock
GPIO Events
GPIO Clears
compare >=
IRQ Flag A or B
For each clock event channel, a comparator compares the 1588 Clock with a Clock Target loaded in the 1588 Clock
Target x Seconds Register (1588_CLOCK_TARGET_SEC_x) and 1588 Clock Target x NanoSeconds Register
(1588_CLOCK_TARGET_NS_x).
The Clock Target Register pair requires two 32-bit write cycles, one to each half, before the register pair is affected. The
writes may be in any order. There is a register pair for each clock event channel (A and B).
The Clock Target can be read by setting the Clock Target Read (1588_CLOCK_TARGET_READ) bit in the 1588 Com-
mand and Control Register (1588_CMD_CTL). This saves the current value of the both Clock Targets (A and B) into the
1588 Clock Target x Seconds Register (1588_CLOCK_TARGET_SEC_x) and 1588 Clock Target x NanoSeconds Reg-
ister (1588_CLOCK_TARGET_NS_x) where they can be read.
When the 1588 Clock reaches or passes the Clock Target for a clock event channel, a clock event occurs which triggers
the following:
• The maskable interrupt for that clock event channel (1588 Timer Interrupt A (1588_TIMER_INT_A) or 1588 Timer
Interrupt B (1588_TIMER_INT_B)) is set in the 1588 Interrupt Status Register (1588_INT_STS).
• The Reload/Add A (RELOAD_ADD_A) or Reload/Add B (RELOAD_ADD_B) bit in the 1588 General Configuration
Register (1588_GENERAL_CONFIG) is checked to determine the new Clock Target behavior:
–RELOAD_ADD = 1:
The new Clock Target is loaded from the Reload / Add Registers (1588 Clock Target x Reload
/ Add Seconds Register (1588_CLOCK_TARGET_RELOAD_SEC_x) and 1588 Clock Target x
Reload / Add NanoSeconds Register (1588_CLOCK_TARGET_RELOAD_NS_x)).
–RELOAD_ADD = 0:
The Clock Target is incremented by the Reload / Add Registers (1588 Clock Target x Reload /
Add Seconds Register (1588_CLOCK_TARGET_RELOAD_SEC_x) and 1588 Clock Target x
Reload / Add NanoSeconds Register (1588_CLOCK_TARGET_RELOAD_NS_x)). The Clock
Target NanoSeconds rolls over at 10^9 and the carry is added to the Clock Target Seconds.
The Clock Target Reload / Add Register pair requires two 32-bit write cycles, one to each half, before the register pair
is affected. The writes may be in any order. There is a register pair for each clock event channel (A and B).
Note: Writing the 1588 Clock may cause the interrupt event to occur if the new 1588 Clock value is set equal to or
greater than the current Clock Target.
The Clock Target reload function (RELOAD_ADD = 1) allows the Host to pre-load the next trigger time in advance. The
add function (RELOAD_ADD = 0), allows for a automatic repeatable event.
DS00001925A-page 412
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