LAN9353 Datasheet, PDF (420/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.8.2 1588 GENERAL CONFIGURATION REGISTER (1588_GENERAL_CONFIG)
Offset:
Bank:
104h
na
Size:
32 bits
Bits
Description
31:19
18
RESERVED
Time-Stamp Unit 2 Enable (TSU_ENABLE_2)
This bit enables the receive and transmit functions of time-stamp unit 2. The
1588 Enable (1588_ENABLE) bit in 1588 Command and Control Register
(1588_CMD_CTL) bit must also be set.
Note:
The host S/W must not change this bit while the 1588 Enable
(1588_ENABLE) bit in 1588 Command and Control Register
(1588_CMD_CTL) is set.
17 Time-Stamp Unit 1 Enable (TSU_ENABLE_1)
This bit enables the receive and transmit functions of time-stamp unit 1. The
1588 Enable (1588_ENABLE) bit in 1588 Command and Control Register
(1588_CMD_CTL) bit must also be set.
Note:
The host S/W must not change this bit while the 1588 Enable
(1588_ENABLE) bit in 1588 Command and Control Register
(1588_CMD_CTL) is set.
16 Time-Stamp Unit 0 Enable (TSU_ENABLE_0)
This bit enables the receive and transmit functions of time-stamp unit 0. The
1588 Enable (1588_ENABLE) bit in 1588 Command and Control Register
(1588_CMD_CTL) bit must also be set.
Note:
The host S/W must not change this bit while the 1588 Enable
(1588_ENABLE) bit in 1588 Command and Control Register
(1588_CMD_CTL) is set.
15 GPIO 1588 Timer Interrupt B Clear Enable
(GPIO_1588_TIMER_INT_B_CLEAR_EN)
This bit enables the selected GPIO to clear the 1588_TIMER_INT_B bit of
the 1588 Interrupt Status Register (1588_INT_STS).
The GPIO input is selected using the GPIO 1588 Timer Interrupt B Clear
Select (GPIO_1588_TIMER_INT_B_CLEAR_SEL[2:0]) bits in this register.
14:12
The polarity of the GPIO input is determined by GPIO Interrupt/1588 Polarity
7-0 (GPIO_POL[7:0]) in the General Purpose I/O Configuration Register
(GPIO_CFG).
Note:
The GPIO must be configured as an input for this function to
operate. For the clear function, GPIO inputs are edge sensitive and
must be active for greater than 40 ns to be recognized.
GPIO 1588 Timer Interrupt B Clear Select
(GPIO_1588_TIMER_INT_B_CLEAR_SEL[2:0])
These bits determine which GPIO is used to clear the 1588 Timer Interrupt B
(1588_TIMER_INT_B) bit of the 1588 Interrupt Status Register
(1588_INT_STS).
Note: The IEEE 1588 Unit supports 8 GPIO signals.
Type
RO
R/W
R/W
R/W
R/W
R/W
Default
-
1b
1b
1b
0b
000b
DS00001925A-page 420
 2015 Microchip Technology Inc.