LAN9353 Datasheet, PDF (73/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
TABLE 7-1: SOFT-STRAP CONFIGURATION STRAP DEFINITIONS (CONTINUED)
Strap Name
EEE_enable_strap_1
(cont.)
Description
PHY A Energy Efficient Ethernet Enable Strap: This strap
affects the default value of the following register bits (x=A):
Pin / Default Value
EEEEN
auto_mdix_strap_2
manual_mdix_strap_2
• PHY Energy Efficient Ethernet Enable (PHYEEEEN) bit
of the PHY x EDPD NLP / Crossover Time / EEE Configu-
ration Register (PHY_EDPD_CFG_x)
• 100BASE-TX EEE bit of the PHY x EEE Capability Regis-
ter (PHY_EEE_CAP_x)
• 100BASE-TX EEE bit of the PHY x EEE Advertisement
Register (PHY_EEE_ADV_x)
Note: This has no effect when the PHY is in 100BASE-FX
mode.
Refer to the respective register definition sections for addi-
tional information.
PHY B Auto-MDIX Enable Strap: Configures the default
1b
value of the AMDIX_EN Strap State Port B bit of the Hardware
Configuration Register (HW_CFG).
This strap is also used in conjunction with manual_mdix-
_strap_2 to configure PHY B Auto-MDIX functionality when
the Auto-MDIX Control (AMDIXCTRL) bit in the (x=B) PHY x
Special Control/Status Indication Register (PHY_SPECIAL_-
CONTROL_STAT_IND_x) indicates the strap settings should
be used for auto-MDIX configuration.
Note: This has no effect when the PHY is in 100BASE-FX
mode.
Refer to the respective register definition sections for addi-
tional information.
PHY B Manual MDIX Strap: Configures MDI(0) or MDIX(1) 0b
for Port 2 when the auto_mdix_strap_2 is low and the Auto-
MDIX Control (AMDIXCTRL) bit in the (x=B) PHY x Special
Control/Status Indication Register (PHY_SPECIAL_CON-
TROL_STAT_IND_x) indicates the strap settings are to be
used for auto-MDIX configuration.
Note: This has no effect when the PHY is in 100BASE-FX
mode.
Refer to the respective register definition sections for addi-
tional information.
 2015 Microchip Technology Inc.
DS00001925A-page 73