LAN9353 Datasheet, PDF (146/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
9.2.20.18 PHY x Special Control/Status Indication Register (PHY_SPECIAL_CONTROL_STAT_IND_x)
Index (decimal): 27
Size:
This read/write register is used to control various options of the PHY.
16 bits
Bits
Description
Type
15 Auto-MDIX Control (AMDIXCTRL)
R/W
This bit is responsible for determining the source of Auto-MDIX control for
NASR
Port x. When set, the Manual MDIX and Auto MDIX straps (manual_mdix-
Note 23
_strap_1/auto_mdix_strap_1) are overridden, and Auto-MDIX functions are
controlled using the AMDIXEN and AMDIXSTATE bits of this register. When
cleared, Auto-MDIX functionality is controlled by the Manual MDIX and Auto
MDIX straps by default. Refer to Section 7.0, "Configuration Straps," on
page 67 for configuration strap definitions.
0: Port x Auto-MDIX determined by strap inputs (Table 9-18)
1: Port x Auto-MDIX determined by bits 14 and 13
Note:
The values of auto_mdix_strap_1 and auto_mdix_strap_2 are
indicated in the AMDIX_EN Strap State Port A and the
AMDIX_EN Strap State Port B bits of the Hardware Configuration
Register (HW_CFG).
Default
0b
14 Auto-MDIX Enable (AMDIXEN)
R/W
When the AMDIXCTRL bit of this register is set, this bit is used in conjunction _NASR
with the AMDIXSTATE bit to control the Port x Auto-MDIX functionality as
Note 23
shown in Table 9-17.
Auto-MDIX is not appropriate and should not be enabled for 100BASE-FX
mode.
13 Auto-MDIX State (AMDIXSTATE)
R/W
When the AMDIXCTRL bit of this register is set, this bit is used in conjunction _NASR
with the AMDIXEN bit to control the Port x Auto-MDIX functionality as shown _{Note 23}
in Table 9-17.
12 RESERVED
RO
11 SQE Test Disable (SQEOFF)
This bit controls the disabling of the SQE test (Heartbeat). SQE test is
enabled by default.
R/W
NASR
Note 23
0: SQE test enabled
1: SQE test disabled
10:6 RESERVED
RO
5
Far End Fault Indication Enable (FEFI_EN)
R/W
This bit enables Far End Fault Generation and Detection. See Section
9.2.17.1, "100BASE-FX Far End Fault Indication," on page 118 for more
information.
0b
0b
-
0b
-
Note 24
DS00001925A-page 146
 2015 Microchip Technology Inc.