LAN9353 Datasheet, PDF (415/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.8 1588 Registers
This section details the directly addressable PTP timestamp related registers.
Each port has a PTP timestamp block with related registers. These sets of registers are identical in functionality for each
port, and thus their register descriptions have been consolidated. In these cases, the register names will be amended
with a lowercase “x” in place of the port designation. The wildcard “x” should be replaced with “0”, “1” or “2” respectively.
For GPIO related registers, the wildcard “x” should be replaced with “0” through “7”.
Similarly, for Clock Compare events, the wildcard “x” should be replaced with “A” or “B”.
Port and GPIO registers share a common address space. Port vs. GPIO registers are selected by using the Bank Select
(BANK_SEL[2:0] in the 1588 Bank Port GPIO Select Register (1588_BANK_PORT_GPIO_SEL). The port accessed
(“x”) is set by the Port Select (PORT_SEL[1:0]) field. The GPIO accessed (“x”) is set by the GPIO Select (GPIO_-
SEL[2:0]) field.
Note: The IEEE 1588 Unit supports 8 GPIO signals.
For an overview of the entire directly addressable register map, refer to Section 5.0, "Register Map," on page 41.
TABLE 15-1: 1588 CONTROL AND STATUS REGISTERS
BANK
SELECT
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
ADDRESS
OFFSET
100h
104h
108h
10Ch
110h
114h
118h
11Ch
120h
124h
128h
12Ch
130h
134h
138h
13Ch
140h
144h
Register Name (Symbol)
1588 Command and Control Register (1588_CMD_CTL)
1588 General Configuration Register (1588_GENERAL_CONFIG)
1588 Interrupt Status Register (1588_INT_STS)
1588 Interrupt Enable Register (1588_INT_EN)
1588 Clock Seconds Register (1588_CLOCK_SEC)
1588 Clock NanoSeconds Register (1588_CLOCK_NS)
1588 Clock Sub-NanoSeconds Register (1588_CLOCK_SUBNS)
1588 Clock Rate Adjustment Register (1588_CLOCK_RATE_ADJ)
1588 Clock Temporary Rate Adjustment Register (1588_CLOCK_TEMP_RATE_-
ADJ)
1588 Clock Temporary Rate Duration Register (1588_CLOCK_TEMP_RATE_DU-
RATION)
1588 Clock Step Adjustment Register (1588_CLOCK_STEP_ADJ)
1588 Clock Target x Seconds Register (1588_CLOCK_TARGET_SEC_x) x=A
1588 Clock Target x NanoSeconds Register (1588_CLOCK_TARGET_NS_x) x=A
1588 Clock Target x Reload / Add Seconds Register (1588_CLOCK_TARGET_RE-
LOAD_SEC_x) x=A
1588 Clock Target x Reload / Add NanoSeconds Register (1588_CLOCK_TAR-
GET_RELOAD_NS_x) x=A
1588 Clock Target x Seconds Register (1588_CLOCK_TARGET_SEC_x) x=B
1588 Clock Target x NanoSeconds Register (1588_CLOCK_TARGET_NS_x) x=B
1588 Clock Target x Reload / Add Seconds Register (1588_CLOCK_TARGET_RE-
LOAD_SEC_x) x=B
 2015 Microchip Technology Inc.
DS00001925A-page 415