LAN9353 Datasheet, PDF (472/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
15.8.42 1588 PORT X TX MESSAGE HEADER REGISTER (1588_TX_MSG_HEADER_X)
Offset:
Bank:
174h
2
Size:
32 bits
This read only register contains the TX message header. Up to four captures are buffered.
Note: Values are only valid if the 1588 TX Timestamp Count (1588_TX_TS_CNT[2:0]) field indicates that at least
one timestamp is available.
Note:
Port and GPIO registers share a common address space. Port registers are selected by the Bank Select
(BANK_SEL[2:0] in the 1588 Bank Port GPIO Select Register (1588_BANK_PORT_GPIO_SEL). The port
accessed (“x”) is set by the Port Select (PORT_SEL[1:0]) field.
Bits
31:20
19:16
15:0
Description
Source Port Identity CRC (SRC_PRT_CRC)
This field contains the 12-bit CRC of the sourcePortIdentity field of the trans-
mitted PTP packet.
Message Type (MSG_TYPE)
This field contains the messageType field of the transmitted PTP packet.
Sequence ID (SEQ_ID)
This field contains the sequenceId field of the transmitted PTP packet.
Type
RO
RO
RO
Default
000h
0h
0000h
DS00001925A-page 472
 2015 Microchip Technology Inc.