LAN9353 Datasheet, PDF (28/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
TABLE 3-7: SWITCH PORT 1 RMII & CONFIGURATION STRAP PIN DESCRIPTIONS
Num
Pins
Name
Symbol
1
Port 1 RMII
Input Data 1
P1_IND1
1
Port 1 RMII
Input Data 0
P1_IND0
1
Port 1 RMII
Input Data Valid
P1_INDV
Port 1 RMII
Output Data 1
1
Port 1 Mode[2]
Configuration
Strap
P1_OUTD1
P1_MODE2
Buffer
Type
VIS
(PD)
VIS
(PD)
(PD)
VIS
(PD)
VIS
(PD)
(PD)
VIS
(PD)
VIS
(PD)
(PD)
VO8
VO8
-
VIS
(PU)
Note 11
Description
RMII MAC Mode: This pin is the receive data 1 bit
from the external PHY to the switch.
RMII PHY Mode: This pin is the transmit data 1 bit
from the external MAC to the switch. The pull-down
and input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Port 1 Port x Virtual
PHY Basic Control Register (VPHY_BASIC_C-
TRL_x).
Internal PHY Mode: This pin is not used.
RMII MAC Mode: This pin is the receive data 0 bit
from the external PHY to the switch.
RMII PHY Mode: This pin is the transmit data 0 bit
from the external MAC to the switch. The pull-down
and input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Port 1 Port x Virtual
PHY Basic Control Register (VPHY_BASIC_C-
TRL_x).
Internal PHY Mode: This pin is not used.
RMII MAC Mode: This pin is the CRS_DV signal
from the external PHY.
RMII PHY Mode: This pin is the TX_EN signal from
the external MAC and indicates valid data on
P1_IND[1:0]. The pull-down and input buffer are dis-
abled when the Isolate (VPHY_ISO) bit is set in the
Port 1 Port x Virtual PHY Basic Control Register
(VPHY_BASIC_CTRL_x).
Internal PHY Mode: This pin is not used.
RMII MAC Mode: This pin is the transmit data 1 bit
from the switch to the external PHY.
RMII PHY Mode: This pin is the receive data 1 bit
from the switch to the external MAC. The output
driver is disabled when the Isolate (VPHY_ISO) bit
is set in the Port 1 Port x Virtual PHY Basic Control
Register (VPHY_BASIC_CTRL_x).
Internal PHY Mode: This pin is not used.
This strap configures the mode for Port 1. See
Note 10.
Refer to Table 7-4, “Port 1 Mode Strap Mapping,” on
page 83 for the Port 1 strap settings.
DS00001925A-page 28
 2015 Microchip Technology Inc.