LAN9353 Datasheet, PDF (351/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
12.3.6.4 Timeout Due to Busy or Arbitration
It is possible for another master to monopolize the bus (due to a continual bus busy or more successful arbitration). If
successful arbitration is not achieved within 1.92 s from the start of the read or write request or from the start of the Poll
Cycle, the command sequence or Poll Cycle is aborted and the EEPROM Controller Timeout (EPC_TIMEOUT) bit in
the EEPROM Command Register (E2P_CMD) is set. Note that this is a total timeout value and not the timeout for any
one portion of the sequence.
12.3.7 I²C MASTER EEPROM CONTROLLER OPERATION
I²C master EEPROM operations are performed using the EEPROM Command Register (E2P_CMD) and EEPROM
Data Register (E2P_DATA).
The following operations are supported:
• READ (Read Location)
• WRITE (Write Location)
• RELOAD (EEPROM Loader Reload - See Section 12.4, "EEPROM Loader")
Note: The EEPROM Loader uses the READ command only.
The supported commands are detailed in Section 12.5.1, "EEPROM Command Register (E2P_CMD)," on page 358.
Details specific to each operational mode are explained in Section 12.2, "I2C Overview," on page 345 and Section 12.4,
"EEPROM Loader", respectively.
When issuing a WRITE command, the desired data must first be written into the EEPROM Data Register (E2P_DATA).
The WRITE command may then be issued by setting the EEPROM Controller Command (EPC_COMMAND) field of the
EEPROM Command Register (E2P_CMD) to the desired command value. If the operation is a WRITE, the EEPROM
Controller Address (EPC_ADDRESS) field in the EEPROM Command Register (E2P_CMD) must also be set to the
desired location. The command is executed when the EEPROM Controller Busy (EPC_BUSY) bit of the EEPROM Com-
mand Register (E2P_CMD) is set. The completion of the operation is indicated when the EEPROM Controller Busy
(EPC_BUSY) bit is cleared.
When issuing a READ command, the EEPROM Controller Command (EPC_COMMAND) and EEPROM Controller
Address (EPC_ADDRESS) fields of the EEPROM Command Register (E2P_CMD) must be configured with the desired
command value and the read address, respectively. The READ command is executed by setting the EEPROM Control-
ler Busy (EPC_BUSY) bit of the EEPROM Command Register (E2P_CMD). The completion of the operation is indicated
when the EEPROM Controller Busy (EPC_BUSY) bit is cleared, at which time the data from the EEPROM may be read
from the EEPROM Data Register (E2P_DATA).
The RELOAD operation is performed by writing the RELOAD command into the EEPROM Controller Command
(EPC_COMMAND) field of the EEPROM Command Register (E2P_CMD). The command is executed by setting the
EEPROM Controller Busy (EPC_BUSY) bit of the EEPROM Command Register (E2P_CMD). In all cases, the software
must wait for the EEPROM Controller Busy (EPC_BUSY) bit to clear before modifying the EEPROM Command Register
(E2P_CMD).
If an operation is attempted and the EEPROM device does not respond within 30 ms, the device will timeout and the
EEPROM Controller Timeout (EPC_TIMEOUT) bit of the EEPROM Command Register (E2P_CMD) will be set.
 2015 Microchip Technology Inc.
DS00001925A-page 351