LAN9353 Datasheet, PDF (107/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
dition to de-assert is true, then the Interrupt Source Flag is cleared and the internal interrupt signal is also deasserted.
If the condition to de-assert is false, then the Interrupt Source Flag remains set, and the internal interrupt signal remains
asserted.
TABLE 9-4: ALTERNATIVE INTERRUPT MODE MANAGEMENT TABLE
Mask
30.9
30.8
30.7
30.6
30.5
30.4
30.3
30.2
30.1
Interrupt Source Flag
Interrupt Source
Event to
Assert
interrupt
29.9 Link Up
LINKSTAT
See
Note 4
Link Status
Rising LINK-
STAT
29.8 Wake on LAN
WOL_INT
See
Note 5
Enabled
WOL event
Rising
WOL_INT
29.7 ENERGYON
17.1
ENERGYON Rising 17.1
29.6 Auto-Negotia-
1.5
tion complete
Auto-Negoti-
ate Com-
plete
Rising 1.5
29.5 Remote Fault
1.4
Detected
Remote
Fault
Rising 1.4
29.4 Link Down
1.2
Link Status Falling 1.2
29.3 Auto-Negotia-
5.14
tion LP Acknowl-
edge
Acknowl-
edge
Rising 5.14
29.2 Parallel Detec- 6.4
tion Fault
Parallel
Detection
Fault
Rising 6.4
29.1 Auto-Negotia-
6.1
tion Page
Received
Page
Received
Rising 6.1
Condition
to
De-assert
LINKSTAT
low
WOL_INT
low
17.1 low
1.5 low
1.4 low
1.2 high
5.14 low
6.4 low
6.1 low
Bit to Clear
interrupt
29.9
29.8
29.7
29.6
29.5
29.4
29.3
29.2
29.1
Note 4: LINKSTAT is the internal link status and is not directly available in any register bit.
Note 5: WOL_INT is defined as bits 7:4 in the PHY x Wakeup Control and Status Register (PHY_WUCSR_x) ANDed
with bits 3:0 of the same register, with the resultant 4 bits OR’ed together.
Note:
The Energy On (ENERGYON) bit in the PHY x Mode Control/Status Register (PHY_MODE_CON-
TROL_STATUS_x) is defaulted to a ‘1’ at the start of the signal acquisition process, therefore the INT7 bit
in the PHY x Interrupt Source Flags Register (PHY_INTERRUPT_SOURCE_x) will also read as a ‘1’ at
power-up. If no signal is present, then both Energy On (ENERGYON) and INT7 will clear within a few mil-
liseconds.
 2015 Microchip Technology Inc.
DS00001925A-page 107