LAN9353 Datasheet, PDF (83/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
Note 1: The combined Port 0 strap chart is as follows:
TABLE 7-3: PORT 0 MODE STRAP MAPPING
P1_INTPHY :
P0_MODE3
10
10
10
10
0x or 11
0x or 11
0x or 11
0x or 11
0x or 11
0x or 11
P0_MODE2 P0_MODE1 P0_MODE0
Mode
0
x
x
MII MAC
1
0
x
MII PHY
1
1
0
Turbo MII PHY 12 ma
1
1
1
Turbo MII PHY 16 ma
0
0
x
RMII MAC clock in
0
1
0
RMII MAC clock out 12ma
0
1
1
RMII MAC clock out 16ma
1
0
x
RMII PHY clock in
1
1
0
RMII PHY clock out 12ma
1
1
1
RMII PHY clock out 16ma
Note 2: The combined Port 1 strap chart is as follows:
TABLE 7-4: PORT 1 MODE STRAP MAPPING
P1_INTPHY
0
0
0
0
0
0
1
P1_MODE2 P1_MODE1 P1_MODE0
Port 1 Mode
0
0
x
RMII MAC clock in
(RMII pin remap mode)
0
1
0
RMII MAC clock out 12ma
(RMII pin remap mode)
0
1
1
RMII MAC clock out 16ma
(RMII pin remap mode)
1
0
x
RMII PHY clock in
(RMII pin remap mode)
1
1
0
RMII PHY clock out 12ma
(RMII pin remap mode)
1
1
1
RMII PHY clock out 16ma
(RMII pin remap mode)
x
x
x
Internal PHY
 2015 Microchip Technology Inc.
DS00001925A-page 83