LAN9353 Datasheet, PDF (274/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
10.7.2.27 Port x EEE Time Wait TX System Register (EEE_TW_TX_SYS_x)
Register #:
Port0: 0442h
Port1: 0842h
Port2: 0C42h
Size:
32 bits
This register configures the time to wait before starting packet transmission after TX LPI removal.
Bits
Description
31:24
23:0
RESERVED
TX Delay After TX LPI Removal
This field configures the time to wait, in microseconds, before starting packet
transmission after TX LPI removal.
Software should only change this field when the Energy Efficient Ethernet
(EEE_ENABLE) bit is cleared.
Note: In order to meet the IEEE 802.3 specified requirement, the
minimum value of this field should be 00001Eh.
Type
RO
R/W
Default
-
00001Eh
DS00001925A-page 274
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