LAN9353 Datasheet, PDF (253/523 Pages) Microchip Technology – Interfaces at up to 200Mbps via Turbo MII

LAN9353
TABLE 10-9: INDIRECTLY ACCESSIBLE SWITCH CONTROL AND STATUS REGISTERS
Address
(INDIRECT)
Register Name (SYMBOL)
1845h
Switch Engine Priority to Queue Register (SWE_PRI_TO_QUE)
1846h
Switch Engine Port Mirroring Register (SWE_PORT_MIRROR)
1847h
Switch Engine Ingress Port Type Register (SWE_INGRSS_PORT_TYP)
1848h
Switch Engine Broadcast Throttling Register (SWE_BCST_THROT)
1849h
Switch Engine Admit Non Member Register (SWE_ADMT_N_MEMBER)
184Ah
Switch Engine Ingress Rate Configuration Register (SWE_INGRSS_RATE_CFG)
184Bh
Switch Engine Ingress Rate Command Register (SWE_INGRSS_RATE_CMD)
184Ch
Switch Engine Ingress Rate Command Status Register (SWE_INGRSS_RATE_CMD_STS)
184Dh
Switch Engine Ingress Rate Write Data Register (SWE_INGRSS_RATE_WR_DATA)
184Eh
Switch Engine Ingress Rate Read Data Register (SWE_INGRSS_RATE_RD_DATA)
184Fh
Reserved for Future Use (RESERVED)
1850h
Switch Engine Port 0 Ingress Filtered Count Register (SWE_FILTERED_CNT_0)
1851h
Switch Engine Port 1 Ingress Filtered Count Register (SWE_FILTERED_CNT_1)
1852h
Switch Engine Port 2 Ingress Filtered Count Register (SWE_FILTERED_CNT_2)
1853h-1854h Reserved for Future Use (RESERVED)
1855h
Switch Engine Port 0 Ingress VLAN Priority Regeneration Table Register (SWE_INGRSS_RE-
GEN_TBL_0)
1856h
Switch Engine Port 1 Ingress VLAN Priority Regeneration Table Register (SWE_INGRSS_RE-
GEN_TBL_1)
1857h
Switch Engine Port 2 Ingress VLAN Priority Regeneration Table Register (SWE_INGRSS_RE-
GEN_TBL_2)
1858h
Switch Engine Port 0 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_0)
1859h
Switch Engine Port 1 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_1)
185Ah
Switch Engine Port 2 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_2)
185Bh-187Fh Reserved for Future Use (RESERVED)
1880h
Switch Engine Interrupt Mask Register (SWE_IMR)
1881h
Switch Engine Interrupt Pending Register (SWE_IPR)
1882h-1BFFh Reserved for Future Use (RESERVED)
1C00h
1C01h
1C02h
1C03h
Buffer Manager (BM) CSRs
Buffer Manager Configuration Register (BM_CFG)
Buffer Manager Drop Level Register (BM_DROP_LVL)
Buffer Manager Flow Control Pause Level Register (BM_FC_PAUSE_LVL)
Buffer Manager Flow Control Resume Level Register (BM_FC_RESUME_LVL)
 2015 Microchip Technology Inc.
DS00001925A-page 253