HD64F2145 Datasheet, PDF (84/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 2.4 Arithmetic Operations Instructions (1)
Instruction Size*
ADD
B/W/L
SUB
ADDX
B
SUBX
Function
Rd ± Rs → Rd, Rd ± #IMM → Rd
Performs addition or subtraction on data in two general registers, or on
immediate data and data in a general register. (Subtraction on
immediate data and data in a general register cannot be performed in
bytes. Use the SUBX or ADD instruction.)
Rd ± Rs ± C → Rd, Rd ± #IMM ± C → Rd
Performs addition or subtraction with carry on data in two general
registers, or on immediate data and data in a general register.
INC
B/W/L
Rd ± 1 → Rd, Rd ± 2 → Rd
DEC
Adds or subtracts the value 1 or 2 to or from data in a general register.
(Only the value 1 can be added to or subtracted from byte operands.)
ADDS
L
Rd ± 1 → Rd, Rd ± 2 → Rd, Rd ± 4 → Rd
SUBS
Adds or subtracts the value 1, 2, or 4 to or from data in a 32-bit register.
DAA
B
Rd (decimal adjust) → Rd
DAS
Decimal-adjusts an addition or subtraction result in a general register by
referring to CCR to produce 4-bit BCD data.
MULXU
B/W
Rd × Rs → Rd
Performs unsigned multiplication on data in two general registers: either
8 bits × 8 bits → 16 bits or 16 bits × 16 bits → 32 bits.
MULXS
B/W
Rd × Rs → Rd
Performs signed multiplication on data in two general registers: either 8
bits × 8 bits → 16 bits or 16 bits × 16 bits → 32 bits.
DIVXU
B/W
Rd ÷ Rs → Rd
Performs unsigned division on data in two general registers: either 16
bits ÷ 8 bits → 8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits →
16-bit quotient and 16-bit remainder.
Note:* Size refers to the operand size.
B: Byte
W: Word
L: Longword
Rev. 2.0, 08/02, page 44 of 788