HD64F2145 Datasheet, PDF (759/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

28.2.3 AC Characteristics
The following shows the clock timing, control signal timing, bus timing, and on-chip peripheral
function timing. For the AC characteristics test conditions, see figure 28.3.
Clock Timing: Table 28.20 shows the clock timing. The clock timing specified here covers clock
(ø) output and clock pulse generator (crystal) and external clock input (EXTAL pin) oscillation
settling times. For details of external clock input (EXTAL pin and EXCL pin) timing, see section
25, Clock Pulse Generator.
Table 28.20 Clock Timing
Condition A:
V_CC = 5.0 V ± 10%, V_CCB = 5.0 V ± 10%, V_SS = 0 V, ø = 2 MHz to maximum
operating frequency, T_a = –20 to +75°C (normal specification product), T_a =
–40 to +85°C (wide range temperature specification product)
Condition B:
V_CC = 4.0 V to 5.5 V, V_CCB = 4.0 V to 5.5 V, V_SS = 0 V, ø = 2 MHz to
maximum operating frequency, T_a = –20 to +75°C (normal specification
product), T_a = –40 to +85°C (wide range temperature specification product)
Condition C:
V_CC = 2.7 V to 3.6 V, V_CCB = 2.7 V to 5.5 V, V_SS = 0 V, ø = 2 MHz to
maximum operating frequency, T_a = –20 to +75°C
Item
Clock cycle time
Clock high pulse width
Clock low pulse width
Clock rise time
Clock fall time
Oscillation settling time at
reset (crystal)
Oscillation settling time in
software standby (crystal)
External clock output
stabilization delay time
Condition A Condition B Condition C
10 MHz
16 MHz
20 MHz
Test
Symbol Min Max Min Max Min Max Unit Conditions
t
100 500 62.5 500 50 500 ns Figure 28.6
cyc
t_CH
30 — 20 — 17 — ns Figure 28.6
t_CL
30 — 20 — 17 — ns
t
— 20 — 10 — 8
ns
Cr
t
— 20 — 10 — 8
ns
Cf
t
20 — 10 — 10 — ms Figure 28.7
OSC1
t_OSC2
8
—8—
8
— ms Figure 28.8
t_DEXT
500 — 500 — 500 — µs
Rev. 2.0, 08/02, page 719 of 788