HD64F2145 Datasheet, PDF (308/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Figures 12.1 and 12.2 show block diagrams of the 8-bit timer module.
TMR_X and TMR_Y have a similar configuration, but cannot be cascaded. TMR_X also has an
input capture function. For details, see section 13, Timer Connection.
External clock
sources
TMCI0
TMCI1
Internal clock
sources
TMR_0
ø/2, ø/8
ø/32, ø/64
ø/256, ø/1024
TMR_1
ø/2, ø/8
ø/64, ø/128
ø/1024, ø/2048
TMO0
TMRI0
TMO1
TMRI1
Clock select
Clock 1
Clock 0
TCORA_0
TCORA_1
Compare-match A1
Compare-match A0 Comparator A_0 Comparator A_1
Control logic
Overflow 1
Overflow 0
TCNT_0
TCNT_1
Clear 0
Clear 1
Compare-match B1
Compare-match B0 Comparator B_0 Comparator B_1
TCORB_0
TCORB_1
TCSR_0
TCSR_1
Interrupt signals
CMIA0
CMIB0
OVI0
CMIA1
CMIB1
OVI1
TCR_0
TCR_1
Legend
TCORA_0 : Time constant register A_0
TCORB_0 : Time constant register B_0
TCNT_0 : Timer counter_0
TCSR_0 : Timer control/status register_0
TCR_0 : Timer control register_0
TCORA_1 : Time constant register A_1
TCORB_1 : Time constant register B_1
TCNT_1 : Timer counter_1
TCSR_1 : Timer control/status register_1
TCR_1 : Timer control register_1
Figure 12.1 Block Diagram of 8-Bit Timers (TMR_0 and TMR_1)
Rev. 2.0, 08/02, page 268 of 788