HD64F2145 Datasheet, PDF (762/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Condition A Condition B Condition C
Item
10 MHz
Symbol Min Max
16 MHz
20 MHz
Test
Min Max Min Max Unit Conditions
Read data access t
ACC3
—
2.0
×
t
cyc
—
2.0 × —
2.0 × ns Figures 28.9
time 3
– 60
t_cyc –
t_cyc –
to 28.13
40
30
Read data access t
ACC4
—
2.5
×
t
cyc
—
2.5 × —
2.5 × ns
time 4
– 50
t_cyc –
t_cyc –
35
25
Read data access t
ACC5
—
3.0
×
t
cyc
—
3.0 × —
3.0 × ns
time 5
– 60
t–
cyc
t–
cyc
40
30
+:5, /:5 delay
t
WRD1
—
60
— 45 —
30 ns
time 1
+:5, /:5 delay
t
WRD2
—
60
— 45 —
30 ns
time 2
+:5, /:5 pulse
width 1
t_WSW1
1.0 × t_cyc —
– 40
1.0 × — 1.0 × t_cyc — ns
t–
cyc
– 20
30
+:5, /:5 pulse
width 2
t_WSW2
1.5 × t_cyc —
– 40
1.5 × — 1.5 × t_cyc — ns
t–
cyc
– 20
30
Write data delay
t_WDD
time
—
60
— 45 —
30 ns
Write data setup t
0
—
0 —0
— ns
WDS
time
Write data hold time t
WDH
:$,7 setup time
t
WTS
:$,7 hold time
t
WTH
20
—
60
—
10
—
15 — 10
45 — 30
5 —5
— ns
— ns
— ns
Rev. 2.0, 08/02, page 722 of 788