HD64F2145 Datasheet, PDF (516/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Processing 1
Receive operation ends
[1]
normally
Receive data processing
Clear KBF flag
(KCLK = High)
[1] On the system side, drive the KCLK pin low,
setting the I/O inhibit state.
Transmit enabled state.
If there is transmit data,
the data is transmitted.
Figure 17.7 (2) Sample Receive Abort Processing Flowchart
Keyboard side monitors clock during
receive operation (transmit operation
as seen from keyboard), and aborts
receive operation during this period.
Reception in progress
KCLK
(pin state)
Receive abort request
Transmit operation
Start bit
KD
(pin state)
KCLK
(input)
KCLK
(output)
KD
(input)
KD
(output)
Figure 17.8 Receive Abort and Transmit Start
(Transmission/Reception Switchover) Timing
Rev. 2.0, 08/02, page 476 of 788