HD64F2145 Datasheet, PDF (273/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit Bit Name
2 OEA
1 OS
0 CKS
Initial Value R/W
0
R/W
0
R/W
0
R/W
Description
Output Enable A
Enables or disables output on PWM (D/A) channel A.
0: PWM (D/A) channel A output (at the PWX0 pin) is
disabled
1: PWM (D/A) channel A output (at the PWX0 pin) is
enabled
Output Select
Selects the phase of the PWM (D/A) output.
0: Direct PWM (D/A) output
1: Inverted PWM (D/A) output
Clock Select
Selects the PWM (D/A) resolution. If the system clock
(ø) frequency is 10 MHz, resolutions of 100 ns and 200
ns, can be selected.
0: Operates at resolution (T) = system clock cycle time
(t )
cyc
1: Operates at resolution (T) = system clock cycle time
(t )
cyc
×
2
10.4 Bus Master Interface
DACNT, DADRA, and DADRB are 16-bit registers. The data bus linking the bus master and the
on-chip peripheral modules, however, is only 8 bits wide. When the bus master accesses these
registers, it therefore uses an 8-bit temporary register (TEMP).
These registers are written to and read from as follows.
Write: When the upper byte is written to, the upper-byte write data is stored in TEMP. Next,
when the lower byte is written to, the lower-byte write data and TEMP value are combined, and
the combined 16-bit value is written in the register.
Read: When the upper byte is read from, the upper-byte value is transferred to the CPU and the
lower-byte value is transferred to TEMP. Next, when the lower byte is read from, the lower-byte
value in TEMP is transferred to the CPU.
These registers should always be accessed 16 bits at a time with a MOV instruction, and the upper
byte should always be accessed before the lower byte. Correct data will not be transferred if only
the upper byte or only the lower byte is accessed. Also note that a bit manipulation instruction
cannot be used to access these registers.
Example 1: Write to DACNT
Rev. 2.0, 08/02, page 233 of 788