HD64F2145 Datasheet, PDF (508/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit Bit Name Initial Value R/W Description
3 KBIE
0
R/W Keyboard Interrupt Enable
Enables or disables interrupts from the keyboard
buffer controller to the CPU.
0: Interrupt requests are disabled
1: Interrupt requests are enabled
2 KBF
0
R/(W)* Keyboard Buffer Register Full
Indicates that data reception has been completed and
the received data is in KBBR.
0: [Clearing condition]
Read KBF when KBF =1, then write 0 in KBF
1: [Setting conditions]
• When data has been received normally and has
been transferred to KBBR while KBFSEL = 1
(keyboard buffer register full flag)
• When a KCLK falling edge is detected while
KBFSEL = 0 (KCLK interrupt flag)
1 PER
0
R/(W)* Parity Error
Indicates that an odd parity error has occurred.
0: [Clearing condition]
Read PER when PER =1, then write 0 in PER
1: [Setting condition]
When an odd parity error occurs
0 KBS
0
R
Keyboard Stop
Indicates the receive data stop bit. Valid only when
KBF = 1.
0: 0 stop bit received
1: 1 stop bit received
Note:* Only 0 can be written for clearing the flag.
Rev. 2.0, 08/02, page 468 of 788