HD64F2145 Datasheet, PDF (278/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Basic cycle
No.0
Basic cycle
No.1
One conversion cycle
Basic cycle
No.63
Basic pulse
High width: 2/256 (T)
Basic pulse
2/256 (T)
Additional pulse output position
Additional
pulse
1/256 (T)
Figure 10.6 Output Waveform when DADR = H’0207 (OS = 1)
Note that the case of CFS = 0 (basic cycle = resolution (T) × 64) is similar other than the duty ratio
of the basic pulse is determined by the upper six bits, and the position of the additional pulse is
determined by the following eight bits.
Rev. 2.0, 08/02, page 238 of 788