HD64F2145 Datasheet, PDF (210/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

8.5.1 Port 4 Data Direction Register (P4DDR)
P4DDR specifies input or output for the pins of port 4 on a bit-by-bit basis.
Bit Bit Name Initial Value R/W Description
7
P47DDR 0
6
P46DDR 0
5
P45DDR 0
4
P44DDR 0
3
P43DDR 0
2
P42DDR 0
W
When a bit in P4DDR is set to 1, the corresponding
W
pin functions as an output port, and when cleared to
0, as an input port.
W
As 14-bit PWM and SCI_2 are initialized in software
W
standby mode, the pin states are determined by the
W
TMR_0, TMR_1, XBS, IIC_1, P4DDR, and P4DR
specifications.
W
1
P41DDR 0
W
0
P40DDR 0
W
8.5.2 Port 4 Data Register (P4DR)
P4DR stores output data for port 4.
Bit Bit Name Initial Value R/W
7
P47DR
0
R/W
6
P46DR
0
R/W
5
P45DR
0
R/W
4
P44DR
0
R/W
3
P43DR
0
R/W
2
P42DR
0
R/W
1
P41DR
0
R/W
0
P40DR
0
R/W
Description
If a port 4 read is performed while P4DDR bits are
set to 1, the P4DR values are read directly,
regardless of the actual pin states. If a port 4 read is
performed while P4DDR bits are cleared to 0, the
pin states are read.
Rev. 2.0, 08/02, page 170 of 788