HD64F2145 Datasheet, PDF (123/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 4.3 shows the status of CCR after execution of trap instruction exception handling.
Table 4.3 Status of CCR after Trap Instruction Exception Handling
Interrupt Control Mode
I
0
1
1
1
Legend
1: Set to 1
—: Retains value prior to execution
CCR
UI
—
1
4.6 Stack Status after Exception Handling
Figure 4.2 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
Normal mode
Advanced mode
SP
CCR
CCR*
PC
(16 bits)
SP
CCR
PC
(24 bits)
Note: Ignored on return.
Figure 4.2 Stack Status after Exception Handling
Rev. 2.0, 08/02, page 83 of 788