HD64F2145 Datasheet, PDF (274/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

MOV.W R0, @DACNT ; Write R0 contents to DACNT
Example 2: Read DADRA
MOV.W @DADRA, R0 ; Copy contents of DADRA to R0
Table 10.2 Read and Write Access Methods for 16-Bit Registers
Read
Write
Register Name
Word
Byte
Word
Byte
DADRA and DADRB
Yes
Yes
Yes
×
DACNT
Yes
×
Yes
×
Legend
Yes: Permitted type of access. Word access includes successive byte accesses to the upper
byte (first) and lower byte (second).
×: This type of access may give incorrect results.
10.5 Operation
A PWM waveform like the one shown in figure 10.2 is output from the PWMX pin. The value in
DADR corresponds to the total width (T_L) of the low (0) pulses output in one conversion cycle
(256 pulses when CFS = 0, 64 pulses when CFS = 1). When OS = 0, this waveform is directly
output. When OS = 1, the output waveform is inverted, and the DADR value corresponds to the
total width (T_H) of the high (1) output pulses. Figures 10.3 and 10.4 show the types of waveform
output available.
t_f
Base cycle
(T 64 or T 256)
1 conversion cycle
(T 2¹⁴ (= 16384))
t_L
T: Resolution
m
T_L = t_Ln (OS = 0)
n=1
(When CFS = 0, m = 256
When CFS = 1, m = 64)
Figure 10.2 PWM D/A Operation
Rev. 2.0, 08/02, page 234 of 788