HD64F2145 Datasheet, PDF (384/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit
Bit Name Initial Value R/W Description
3
STOP
0
R/W Stop Bit Length (enabled only in asynchronous
mode)
Selects the stop bit length in transmission.
0: 1 stop bit
1: 2 stop bits
In reception, only the first stop bit is checked. If the
second stop bit is 0, it is treated as the start bit of the
next transmit frame.
2
MP
0
R/W Multiprocessor Mode (enabled only in asynchronous
mode)
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit and
O/( bit settings are invalid in multiprocessor mode.
1
CKS1
0
R/W Clock Select 1,0
0
CKS0
0
R/W These bits select the clock source for the on-chip
baud rate generator.
00: ø clock (n = 0)
01: ø/4 clock (n = 1)
10: ø/16 clock (n = 2)
11: ø/64 clock (n = 3)
For the relation between the bit rate register setting
and the baud rate, see section 15.3.9, Bit Rate
Register (BRR). n is the decimal display of the value
of n in BRR.
Rev. 2.0, 08/02, page 344 of 788