HD64F2145 Datasheet, PDF (478/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Slave receive mode
Initialize IIC
Set MST = 0
and TRS = 0 in ICCR
Set ACKB = 0 in ICSR
and HNDS = 1 in ICXR
Read IRIC flag in ICCR
No
ICDRF = 1?
Yes
Read ICDR, clear IRIC flag
Read IRIC flag in ICCR
No
IRIC = 1?
Yes
Clear IRIC flag in ICCR
[1] Initialization. Select slave receive mode.
[2] Read the receive data remaining unread.
[3] to [7] Wait for one byte to be received (slave address + R/W)
[8] Clear IRIC
Read AASX, AAS and ADZ in ICSR
AAS = 1
Yes
and ADZ = 1?
No
Read TRS in ICCR
General call address processing
* Description omitted
Yes
TRS = 1?
Slave transmit mode
No
Yes
Last reception?
No
Read ICDR
[10] Read the receive data. The first read is a dummy read.
Read IRIC flag in ICCR
No
IRIC = 1?
Yes
Clear IRIC flag in ICCR
[5] to [7] Wait for the reception to end.
[8] Clear IRIC flag.
Set ACKB = 1 in ICSR
Read ICDR
Read IRIC flag in ICCR
No
IRIC = 1?
Yes
Clear IRIC in ICCR
[9] Set acknowledge data for the last reception.
[10] Read the receive data.
[11] Detect stop condition
[12] Clear IRIC flag.
End
Figure 16.18 Sample Flowchart for Operations in Slave Receive Mode (HNDS = 1)
Rev. 2.0, 08/02, page 438 of 788