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HD64F2145 Datasheet, PDF (779/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer
28.3.3 Bus Timing
The bus timings are shown below.
T1
T2
ø
tAD
A23 to A0,
*
tCSD
tAS
tAH
tASD
tASD
*
(read)
D15 to D0
(read)
tRSD1
tACC2
tAS
tACC3
tRSD2
tRDS tRDH
,
(write)
D15 to D0
(write)
tWRD2
tWRD2
tAS
tWDD
tWSW1
tAH
tWDH
Note:*
and are the same pin. The function is selected by the IOSE bit in SYSCR.
Figure 28.11 Basic Bus Timing (Two-State Access)
Rev. 2.0, 08/02, page 739 of 788