English
Language : 

HD64F2145 Datasheet, PDF (37/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer
Table 12.3
Table 12.4
Table 12.5
Table 12.6
Input Capture Signal Selection..............................................................................289
Interrupt Sources of 8-Bit Timers TMR_0, TMR_1, TMR_Y, and TMR_X........290
Timer Output Priorities .........................................................................................294
Switching of Internal Clocks and TCNT Operation ..............................................295
Section 13 Timer Connection
Table 13.1 Pin Configuration ..................................................................................................299
Table 13.2 Synchronization Signal Connection Enable ..........................................................302
Table 13.3 Registers Accessible by TMR_X/TMR_Y............................................................306
Table 13.4 Examples of TCR Settings ....................................................................................309
Table 13.5 Examples of TCORB (Pulse Width Threshold) Settings ......................................309
Table 13.6 Examples of TCR and TCSR Settings...................................................................313
Table 13.7 Examples of TCR, TCSR, TOCR, and OCRDM Settings ....................................315
Table 13.8 Examples of TCR, TCSR, and TCORB Settings ..................................................316
Table 13.9 Examples of OCRAR, OCRAF, TCORA, TCORB, TCR, and TCSR Settings ....318
Table 13.10 HSYNCO Output Modes ......................................................................................320
Table 13.11 VSYNCO Output Modes ......................................................................................321
Section 14 Watchdog Timer (WDT)
Table 14.1 Pin Configuration ..................................................................................................327
Table 14.2 WDT Interrupt Source...........................................................................................335
Section 15 Serial Communication Interface (SCI and IrDA)
Table 15.1 Pin Configuration ..................................................................................................341
Table 15.2 Relationships between N Setting in BRR and Bit Rate B .....................................350
Table 15.3 BRR Settings for Various Bit Rates (Asynchronous Mode) .................................351
Table 15.4 Maximum Bit Rate for Each Frequency (Asynchronous Mode)...........................354
Table 15.5 Maximum Bit Rate with External Clock Input (Asynchronous Mode).................354
Table 15.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) .....................355
Table 15.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode).....355
Table 15.8 Serial Transfer Formats (Asynchronous Mode) ....................................................358
Table 15.9 SSR Status Flags and Receive Data Handling.......................................................365
Table 15.10 IrCKS2 to IrCKS0 Bit Settings .............................................................................384
Table 15.11 SCI Interrupt Sources ............................................................................................385
Section 16 I2C Bus Interface (IIC) (Optional)
Table 16.1 Pin Configuration ..................................................................................................396
Table 16.2 Communication Format.........................................................................................400
Table 16.3 I2C Transfer Rate ...................................................................................................403
Table 16.4 Flags and Transfer States (Master Mode) .............................................................410
Table 16.5 Flags and Transfer States (Slave Mode)................................................................412
Table 16.6 I2C Bus Data Format Symbols...............................................................................425
Table 16.7 Examples of Operation Using DTC ......................................................................451
Table 16.8 IIC Interrupt Sources.............................................................................................454
Table 16.9 I2C Bus Timing (SCL and SDA Outputs)..............................................................455
Rev. 2.0, 08/02, page xxxv of xxxviii