HD64F2145 Datasheet, PDF (809/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Item
Page Revisions (See Manual for Details)
12.3.5 Timer
279
Control/Status Register
(TCSR)
12.3.9 Timer Input Select 282
Register (TISR)
• TCSR_Y
(Error)
Bits 3 and 2
These bits specify how the TMOY pin output level is to be
changed by compare-match B of TCORB_Y and TCNT_Y.
Bits 1 and 0
These bits specify how the TMOY pin output level is to be
changed by compare-match A of TCORA_Y and TCNT_Y.
Note:* Only 0 can be written, for flag clearing.
(Correction)
Bits 3 and 2
These bits specify how the TMOY pin*² output level is to be
changed by compare-match B of TCORB_Y and TCNT_Y.
Bits 1 and 0
These bits specify how the TMOY pin*² output level is to be
changed by compare-match A of TCORA_Y and TCNT_Y.
Notes: 1. Only 0 can be written, for flag clearing.
2. This product does not have a TMOY external
output pin.
(Error)
Bit Bit Name Description
0 IS
Input Select
Selects an internal synchronization signal (IVG signal) or timer
clock/reset input pin (TMIY or ExTMIY) as the signal source of
external clock/reset input for the TMRY counter.
0: IVG signal is selected
1: TMIY or ExTMIY (TMCIY/TMRIY) is selected
(Correction)
Bit Bit Name Description
0 IS
Input Select
Selects an internal synchronization signal (IVG signal) or timer
clock/reset input pin VSYNCI/TMIY (TMCIY/TMRIY) as the
signal source of external clock/reset input for the TMR_Y
counter.
0: IVG signal is selected
1: VSYNCI/TMIY (TMCIY/TMRIY) is selected
Rev. 2.0, 08/02, page 769 of 788