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HD64F2145 Datasheet, PDF (440/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer | |||
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Table 16.2 Communication Format
DDCSWR SAR
SW
FS
0
0
1
1
0
1
SARX
FSX
0
1
0
1
0
1
0
Operating Mode
I2C bus format
⢠SAR and SARX slave addresses recognized
⢠General call address recognized
I2C bus format
⢠SAR slave address recognized
⢠SARX slave address ignored
⢠General call address recognized
I2C bus format
⢠SAR slave address ignored
⢠SARX slave address recognized
⢠General call address ignored
Clocked synchronous serial format
⢠SAR and SARX slave addresses ignored
⢠General call address ignored
Formatless mode (start/stop conditions not detected)
⢠Acknowledge bit used
1
Formatless mode* (start/stop conditions not detected)
⢠No acknowledge bit
Do not set this mode when automatic switching to the I2C
bus format is performed by means of the DDCSWR setting.
⢠I2C bus format: addressing format with an acknowledge bit
⢠Clocked synchronous serial format: non-addressing format without an acknowledge bit, for
master mode only
⢠Formatless mode (for IIC_0 only): non-addressing format with or without an acknowledge bit,
slave mode only, start/stop conditions not detected
Rev. 2.0, 08/02, page 400 of 788
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