HD64F2145 Datasheet, PDF (767/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 28.23 Timing of On-Chip Peripheral Modules (2)
Condition A:
V_CC = 5.0 V ± 10 %, V_CCB = 5.0 V ± 10 %, V_SS = 0 V,
2 MHz to maximum operating frequency,
T_a = –20 to +75°C (normal specification product), T_a = –40 to +85°C (wide
range temperature specification product)
Condition B:
V_CC = 4.0 V to 5.5 V, V_CCB = 4.0 V to 5.5 V, V_SS = 0 V,
2 MHz to maximum operating frequency,
T_a = –20 to +75°C (normal specification product), T_a = –40 to +85°C (wide
range temperature specification product)
Condition C:
V_CC = 2.7 V to 3.6 V, V_CCB = 2.7 V to 5.5 V, V_SS = 0 V, ø = 2 MHz to
maximum operating frequency, T_a = –20 to +75°C
Condition Condition Condition
A
B
C
Item
Sym- ^{10 MHz}
16 MHz
20 MHz
bol Min Max Min Max Min Max Unit
HIF read
&6/HA0 setup time
t
HAR
10
—
10
—
10
—
ns
cycle
&6/HA0 hold time
t
HRA
10
—
10
—
10
—
,25 pulse width
t_HRPW 220 — 120 — 120 —
HDB delay time
t_HRD
—
200 —
100 —
100
HDB hold time
t
0 40 0 25 0 25
HRF
HIRQ delay time t
— 200 — 120 — 120
HIRQ
HIF write
&6/HA0 setup time
t
HAW
10
—
10
—
10
—
cycle
&6/HA0 hold time t_HWA 10 — 10 — 10 —
,2: pulse width t_HWPW 100 — 60 — 60 —
HDB Fast A20 t_HDW 50 — 30 — 30 —
setup gate not
time used
Fast A20
gate used
85 — 55 — 45 —
HDB hold time
t_HWD 25 — 15 — 15 —
GA20 delay time
t_HGA
—
180 —
90
—
90
Test
Conditions
Figure
28.27
Rev. 2.0, 08/02, page 727 of 788