HD64F2145 Datasheet, PDF (634/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

7. Boot mode can be cleared by a reset. Cancel the reset*⁴ after driving the reset pin low, waiting
at least 20 states, and then setting the mode pins. Boot mode is also cleared when a WDT
overflow occurs.
8. Do not change the mode pin input levels in boot mode. If mode pin input levels are changed
from low to high during reset, operating modes are switched and the state of ports that are also
used for address output and bus control output signals ($6, 5', and +:5) are changed*⁵.
Therefore, set these pins carefully not to be output signals during reset or not to conflict with
LSI external signals.
9. All interrupts are disabled during programming or erasing of the flash memory.
Notes: 1. Address area for the H8S/2140B, H8S/2141B, H8S/2148B, H8S/2160B, and
H8S/2161B. On the H8S/2145B, the address area is from H’FFD080 to H’FFD87F.
2. Address area for the H8S/2140B, H8S/2141B, H8S/2148B, H8S/2160B, and
H8S/2161B. On the H8S/2145B, the address area is from H’FFD080 to H’FFD087.
3. RAM address for the H8S/2140B, H8S/2141B, H8S/2148B, H8S/2160B, and
H8S/2161B. On the H8S/2145B, the address is H’FFD088.
4. After reset is cancelled, mode pin input settings must satisfy the mode programming
setup time (t_MDS = 4 states).
5. The ports that also have address output functions output low as address output when
the mode pins are set to mode 1 during a reset. In modes other than mode 1, it enters
the high impedance state. Bus control output signals output high when the mode pins
are set to mode 1 during a reset. In modes other than mode 1, it enters the high
impedance state.
Rev. 2.0, 08/02, page 594 of 788